To overcome the intrinsic limitations of von Neumann computing system with information bottleneck between memory and CPU, we need to develop neuromorphic computing system based on hardware artificial neural network (ANN). Hardware ANN system with high density synapse and neuron can perform massive parallel computing which is effective for pattern recognition and clustering of unstructured data. To implement neuromorphic system, we need to develop ideal synapse device with various requirements such as scalability, MLC characteristics, low power operation, data retention, and symmetric potentiation/depression characteristics. Although various devices such as filamentary ReRAM, PRAM, and MRAM were proposed for synapse applications, these devices cannot meet the requirements of synapse device.
Using redox reaction at metal/Pr0.7Ca0.3MnO3 interface, we developed analog synapse device. Compared with filament switching device which has intrinsic variability of switching parameters, interface switching device exhibits excellent switching uniformity and area scalability. By controlling the reactivity of metal electrode and oxygen concentration in Pr0.7Ca0.3MnO3, we can modulate the resistance change characteristics under potentiation and depression conditions. We have fabricated wafer-scale high density synapse array device with excellent switching uniformity.
By modulating the linearity and symmetry of conductance change, we have estimated the accuracy of pattern recognition of handwritten digits. We found that synapse device with linear and symmetric conductance change exhibits the best accuracy of pattern recognition. We also demonstrated potential application of neuromorphic system for the development of brain-machine interfaces using electroencephalography (EEG) signal.
- D. in Materials Science and Engineering, The Univ. of Texas at Austin, Aug.,1992
- S. in Metallurgical Engineering, Seoul National University, Feb., 1988
Professional Work Experiences
- Professor, Dept. of MSE, POSTECH (May 2012–present)
- Professor, Dept. of MSE, GIST (Oct. 1997–April 2012)
- Principal Research Engineer, LG Semicon Co., Korea (Aug. 1992–1997)
- Visiting Research Professor, of Electrical Eng., Stanford University, USA (Mar. 2007–Feb. 2008)
- Visiting Research Professor, Oak Ridge National Lab., USA (Jan. 2002–Oct. 2002)
- Senior Member of IEEE Electron Device Society
- IEEE International Electron Device Meeting, Memory Technology Program committee (2009, 2010)
- IEEE Semiconductor Interface Specialists Conf., Technical Program Committee (2008, 2009, 2010)
- International Conf. on Solid State Devices and Materials Program committee (2005–2008, 2011–2014)
- Korean Conference on Semiconductors(KCS), Technical Program Co-chair (2012), & Technical Program Vice-chair (2011), Chair of Thin Film committee (2009–2011), & committee (2004–2008)
- Published 330 journal papers and 55 international patents
- Presented 25 IEDM/VLSI technology papers since 1990
- Thesis adviser of 23 Ph.D./54 M.S. students, 14 best student paper awards
- ~35 invited talks and tutorials at international conferences
- Google Scholar Citation : Total Citations: 8315, h-index: 48